A half adder and a full adder from one 74153 multiplexer
How to pick the multiplexer data inputs from a truth table, with measured results.
A 4:1 multiplexer uses two select inputs to pass one of four data inputs to its output. Put A and B on the select inputs and you can choose what the output should be for each of the four A, B combinations, so a single multiplexer can make any function of two variables. The 74153 contains two 4:1 multiplexers, enough for both the sum (S) and the carry (C) in one chip.
In this guide 4
1. Choosing the data inputs
Split the truth table into the four select combinations (B, A). For each one, see how the output depends on the remaining variable (Cin for a full adder). Always 0 means GND, always 1 means VCC, the same as Cin means Cin, and the opposite means Cin (one NOT gate).
| Data input | Select B A | Half adder S (1Y) | Half adder C (2Y) | Full adder S (1Y) | Full adder Cout (2Y) |
|---|---|---|---|---|---|
| Data inputC0 (pins 6, 10) | Select B A00 | Half adder S (1Y)0 | Half adder C (2Y)0 | Full adder S (1Y)Cin | Full adder Cout (2Y)0 |
| Data inputC1 (pins 5, 11) | Select B A01 | Half adder S (1Y)1 | Half adder C (2Y)0 | Full adder S (1Y)Cin | Full adder Cout (2Y)Cin |
| Data inputC2 (pins 4, 12) | Select B A10 | Half adder S (1Y)1 | Half adder C (2Y)0 | Full adder S (1Y)Cin | Full adder Cout (2Y)Cin |
| Data inputC3 (pins 3, 13) | Select B A11 | Half adder S (1Y)0 | Half adder C (2Y)1 | Full adder S (1Y)Cin | Full adder Cout (2Y)1 |
The values are derived from the truth tables in code. B is the upper select bit and A the lower. On the 74153, A is pin 14, B pin 2, 1Y pin 7, 2Y pin 9, VCC pin 16 and GND pin 8.
2. Easy to miss: the strobe (G) pins
1G̅ (pin 1) and 2G̅ (pin 15) on the 74153 are active-low strobes. They must go to GND; if they are High or floating the output stays 0 whatever the inputs. If everything is wired and the output never leaves 0, check these first.
3. Measurements
| Cin | A | B | S measured | Cout measured | Theory |
|---|---|---|---|---|---|
| Cin0 | A0 | B0 | S measured0 | Cout measured0 | Theory✓ |
| Cin0 | A0 | B1 | S measured1 | Cout measured0 | Theory✓ |
| Cin0 | A1 | B0 | S measured1 | Cout measured0 | Theory✓ |
| Cin0 | A1 | B1 | S measured0 | Cout measured1 | Theory✓ |
| Cin1 | A0 | B0 | S measured1 | Cout measured0 | Theory✓ |
| Cin1 | A0 | B1 | S measured0 | Cout measured1 | Theory✓ |
| Cin1 | A1 | B0 | S measured0 | Cout measured1 | Theory✓ |
| Cin1 | A1 | B1 | S measured1 | Cout measured1 | Theory✓ |
All eight full-adder combinations matched the theory. A half adder on the same chip matched in all four cases (C = 1 only when A and B are both 1, S = 1 when they differ). Built from gates, a full adder needs several XOR, AND and OR chips; with a multiplexer it is one 74153 and one NOT gate, with far less wiring.
Try it: add with a 74153
A and B drive the select lines and C0 to C3 carry the values from the table above (0, 1, Cin, Cin). 'LEDs measured' compares with the lab record.
- Select B A
- 00
- S (1Y)
- 0
- C (2Y)
- 0
- LEDs measured
- 0 / 0 ✓
Things to try: changing B A makes both muxes pass the same-numbered input at once. On the full adder, flipping Cin only changes an output when the selected input is Cin or Cin.
4. Going to more bits
Feed each full adder's Cout into the next stage's Cin to build a multi-bit adder. Check 4-bit results in advance with the add mode (s1 s0 = 0 1) of the 4-bit ALU calculator, binary values with the number base converter, and signed results of subtraction with the two's complement calculator.